PWMBFS=PWMBFS_0, PWMXFS=PWMXFS_0, POLA=POLA_0, PWMAFS=PWMAFS_0, POLB=POLB_0, POLX=POLX_0
Output Control Register
| PWMXFS | PWM_X Fault State 0 (PWMXFS_0): Output is forced to logic 0 state prior to consideration of output polarity control. 1 (PWMXFS_1): Output is forced to logic 1 state prior to consideration of output polarity control. 2 (PWMXFS_2): Output is tristated. 3 (PWMXFS_3): Output is tristated. |
| PWMBFS | PWM_B Fault State 0 (PWMBFS_0): Output is forced to logic 0 state prior to consideration of output polarity control. 1 (PWMBFS_1): Output is forced to logic 1 state prior to consideration of output polarity control. 2 (PWMBFS_2): Output is tristated. 3 (PWMBFS_3): Output is tristated. |
| PWMAFS | PWM_A Fault State 0 (PWMAFS_0): Output is forced to logic 0 state prior to consideration of output polarity control. 1 (PWMAFS_1): Output is forced to logic 1 state prior to consideration of output polarity control. 2 (PWMAFS_2): Output is tristated. 3 (PWMAFS_3): Output is tristated. |
| POLX | PWM_X Output Polarity 0 (POLX_0): PWM_X output not inverted. A high level on the PWM_X pin represents the “on” or “active” state. 1 (POLX_1): PWM_X output inverted. A low level on the PWM_X pin represents the “on” or “active” state. |
| POLB | PWM_B Output Polarity 0 (POLB_0): PWM_B output not inverted. A high level on the PWM_B pin represents the “on” or “active” state. 1 (POLB_1): PWM_B output inverted. A low level on the PWM_B pin represents the “on” or “active” state. |
| POLA | PWM_A Output Polarity 0 (POLA_0): PWM_A output not inverted. A high level on the PWM_A pin represents the “on” or “active” state. 1 (POLA_1): PWM_A output inverted. A low level on the PWM_A pin represents the “on” or “active” state. |
| PWMX_IN | PWM_X Input |
| PWMB_IN | PWM_B Input |
| PWMA_IN | PWM_A Input |